Product | Format | Analog Inputs | Analog Outputs | Comment |
CAML-MOD3 CameraLink module | PMC/XMC host | Camera Link Input | Base, Medium and Full mode Camera Link, up to 85MHz clock rate | For use with the PMC-FPGA05 and XMC-FPGA03 |
CSW1 VXS Circuit Switch Card | VXS/VITA 41 (switch) | Circuit switch | Up to 12 front panel fiber optic, 56 1x (14 4x) backplane links up to 3.2Gbps | Supports hardware broadcast, different signal rates across different channels concurrently |
LVDS-MOD3 LVDS module | PMC/XMC host | LVDS module | 64 I/O lines routed as 32 differential pairs | For use with the PMC-FPGA05 and XMC-FPGA05D |
LVDS-MOD4 LVDS module | PMC/XMC host | LVDS module | 134 I/O lines routed as 64 differential pairs | For use with the PMC-FPGA05 and XMC-FPGA05D |
LVDS-MOD5 LVDS module | PMC/XMC host | LVDS module | Up to 52 differential pairs or 104 single-ended signals | For use with the PMC-FPGA05 and XMC-FPGA05D |
PMC-FPGA03 Virtex-II Pro PMC | PMC | FPGA processor and I/O module host | 138 Signals to front panel or RocketIO to front panel. User I/O on PMC P14. Modules include: ADC, DAC, LVDS, RS485 and Camera Link. | User programmable Xilinx Virtex-II Pro XC2VP50; 2x 64MB DDR SDRAM, 3x 2Mx18-bit QDR-II SRAM |
PMC-FPGA03F Quad Virtex-II Pro PMC | PMC | FPGA processor and fiber-optic I/O | 4 fiber-optics on front panel; User I/O on PMC P14 | User programmable Xilinx Virtex-II Pro XC2VP50; 2x 64MB DDR SDRAM, 3x 2Mx18-bit QDR-II SRAM |
PMC-FPGA05 Virtex5 PMC | PMC | Xilinx Virtex-5 LX110/LX155 FPGA. Customizable digital I/O | 138 Signals to front panel. Modules include: ADC, DAC, LVDS, RS485 and Camera Link. | Multiple banks of SRAM for DSP; Multiple banks of SDRAM for large buffers |
RS485-MOD2 RS485 module | PMC/XMC host | EIA-485/422B | 33x EIA-485/422B | For use with the PMC-FPGA05 and PMC-FPGA03 |
XMC-FPGA05D Virtex-5 XMC/PMC | PMC/XMC | Xilinx Virtex-5 SX95T FPGA. Customizable I/O. | 138 Signals to front panel. User I/O on PMC P14. Modules include: ADC, DAC, LVDS, RS485 and Camera Link. | Two banks of 9Mbytes 250MHz QDR2 SRAM memory; Two banks of 128Mbytes 250MHz DDR2 SDRAM memory |
XMC-FPGA05F Virtex-5 XMC | PMC/XMC | Xilinx Virtex-5 SX95T FPGA fiber-optic I/O | User I/O on PMC P14 (64-bit I/O arranged as 32 differential pairs connected directly to the FPGA) | Four banks of 128Mbytes 250MHz DDR2 SDRAM memory |
